A conventional radio receiver converts, or down-converts, a Radio Frequency (RF) signal to an Intermediate Frequency (IF) signal, and subsequently converts the IF signal to a Baseband (BB) frequency signal. An exemplary architecture of such a receiver is depicted in FIG. 1. The receiver may be designed to receive and process two carriers simultaneously, although designs for other purposes or functions are also possible.
As illustrated in FIG. 1, a received RF signal is initially fed to a Low-Noise Amplifier (LNA). The amplified signal is subjected to a quadrature RF down-conversion where the frequency of the driving clock signal such as a local oscillator (LO) signal is set to the center of the two carriers such that the desired RF signals carried by the two carriers can be down-converted to IF signals having the same IF frequency. The complex output of the RF down-converter, including an In-phase (I) signal on the I-channel and a Quadrature-phase (Q) signal on the Q-channel, comprises the desired signals carried on both the carriers. The lower frequency signal appears on the negative side while the higher frequency signal appears on the positive side. Filters, such as band pass filters BPFi and BPFq shown in FIG. 1, are used to filter out the unwanted signals and suppress interference.
A complex mixer stage, or a complex mixer, such as the dual-carrier complex mixer illustrated in the middle of FIG. 1 is used to down-convert the two signals, the I-signal and the Q-signal, to baseband (BB). In other words, the I-signal and the Q-signal on the two carriers are down-converted to respective BB signals. The resulting BB signals are fed to Low Pass Filters (LPF 1-4) and Analogue-to-Digital Converters (ADC 1-4) for further processing. Eventually, as illustrated in FIG. 1, the dual carrier CIF mixer stage down-converts the dual carrier RF signals into quadrature Lower Side Band signals (LSI, LSQ) and quadrature Upper Side Band signals (USI, USQ). Here LS represents Lower Side band, US represents Upper Side band, and I and Q represent in-phase and quadrature-phase, respectively.
Note that FIG. 1 is a simplified view of the conventional receiver architecture with the purpose to exemplify the basic operation only. For ease of explanation, the components LNA, LPFs and ADCs are omitted in the discussion below. The basic architecture of the CIF based receiver shown in FIG. 1 can be simplified into the diagram of FIG. 2.
FIG. 2 presents an ideal case for a dual carrier CIF structure, where no IQ imbalance is assumed to be present. In other words, this CIF based receiver does not suffer from any phase or amplitude mismatch.
As can be seen in FIG. 2, the instantaneous phase of the first mixer stage, namely the RF mixer stage, is denoted as α=ωct=2πfLO1t, where fLO1 is the frequency of the first driving clock signal, for the first mixer stage, and the instantaneous phase of the second mixer stage, or the IF mixer stage, is denoted as β=Ωt=2πfLO2t, where fLO2 is the frequency of the second driving clock signal, for the second mixer stage. Generally the first clock frequency is at RF frequency, and the second clock frequency is at IF frequency. The underlined text strings in the signal paths denote the path gains, which are the modulation factors along the signal paths introduced by the mixer multiplication operations. In the adder outputs, the path gains are sin(α±β) and cos(α±β) for the upper side band (with “+” sign) and the lower side band (with “−” sign), respectively. In the ideal case of FIG. 2, there is no crosstalk between the outputs. The combined paths for LSI, LSQ, USI and USQ have a pure sinusoid product in path gain.
When there is an RF input signal (so(t) in FIG. 2), the signal is multiplied by the path gain, and the resulting output is fed to an LPF (not shown in FIG. 2). All the outband interference signals are removed by the LPF, and only the desired inband signals remain at the output of the LPF. The above approach illustrates the general principle for down-converting an RF signal in the receiver.
In the ideal case for the dual carrier CIF structure, no IQ imbalance is assumed. However, in practice there exists mismatch in clock phase, clock amplitude, path gain, etc., and the mismatch will lead to IQ imbalance.
When there is mismatch in gain or phase for RF clock signals or in the path gains, it will lead to crosstalk or interference between the outputs. The mismatch impact can be analyzed as follows: in general, phase offsets can be added at two quadrature clocks, for example sin(α+Δ1) and cos(α+Δ2). However, since the common phase part is not of interest, so for simplicity only the differential part φ=Δ1−Δ2 can be added in one path, say in the quadrature phase clock cos(α+β). Similarly, a gain error can be added in one path as (1+ε) with the gain of the other path assumed as 1. This gives a mismatch case shown in FIG. 3.
It is well known that RF quadrature mixers suffer from gain and phase imbalance and that the performance in this respect is usually determined, for example by measurement, as Image-Rejection Ratio IRR. For RF quadrature mixers the IRR is typically in the range of 30 to 40 dB. In the architecture described above a poor image rejection will lead to that the lower side carrier leaks into the upper side carrier and/or vice versa. Gain and phase imbalance can also be introduced by the IF filters and the complex mixers. If a strong image interference signal appears at the receiver front-end, for example a blocking signal, the image interference signal may mask the desired signal.